1. Field of the Invention
The present invention relates generally to semiconductor device fabrication, and more particularly to silicon and group III-V semiconductor device fabrication.
2. Background Art
GaN HEMTs (Gallium Nitride High Electron Mobility Transistors), or generally III-nitride HEMTs, GaN FETs, or III-nitride transistors (and even more generally group III-V transistors), are known and utilized due to, for example, their high breakdown voltage and high switching speed. The group III-V transistors can be used in conjunctions with silicon devices in various circuits. For example, a particular silicon device, which can be used with group III-V transistors, is a silicon diode, such as a silicon Schottky diode. In a particular application, the silicon diode can be arranged in parallel with a group III-V transistor, where the anode of the silicon diode is connected to the source of the group III-V transistor and the cathode of the silicon diode is connected to the drain of the group III-V transistor. In another application, the silicon diode can be arranged in series with a group III-V transistor, where the cathode of the silicon diode is connected to the source of the group III-V transistor.
However, the fabrication of group III-V devices, such as, GaN transistors, is often not compatible with popular and commonly used silicon devices. Thus, GaN (or III-nitride) devices, for example, are often manufactured separate from silicon devices, typically resulting in two dies (for example a GaN die and a silicon die), which must be interconnected at the package level. The separate dies increase fabrication cost, packaging cost, area consumed on a PC board, and result in increased parasitic inductance, capacitance and resistance due to interconnections required at the packaging level and the PC board level. Moreover, due to increased assembly cost and complexity, and reduced throughput, the separate dies present severe disadvantages.
Thus, there is a need to overcome the drawbacks and deficiencies in the art by providing a solution where, for example, a semiconductor device can include a silicon device monolithically integrated with a group III-V device.